Timing analysis and optimization of sequential circuits - Maheshwari, Naresh, 1970-; Sapatnekar, Sachin S., 1967- (Boston, Mass. : Kluwer Academic, 1999)
Timing Analysis and Optimization of Sequential Circuits describes CAD algorithms for analyzing and optimizing the timing behavior of sequential circuits with special reference to performance parameters such as power and area. A unified approach to performance analysis and optimization of sequential circuits is presented. The state of the art in timing analysis and optimization techniques are described for circuits using edge-triggered or level-sensitive memory elements.
Specific emphasis is placed on two methods that are true sequential timing optimizations techniques: retiming and clock skew optimization. Timing Analysis and Optimization of Sequential Circuits is written for graduate students, researchers and professionals in the area of CAD for VLSI and VLSI circuit design.
1. Introduction -- 2. Timing Analysis of Sequential Circuits -- 3. Clock Skew Optimization -- 4. The Basics of Retiming -- 5. Minarea Retiming -- 6. Retiming Control Logic -- 7. Miscellaneous Issues in Retiming -- 8. Conclusion.
Includes bibliographical references (p. [171]-188) and index.
Keywords: Integrated circuits -- Very large scale integration -- Design and construction -- Data processing; Computer-aided design; Time-series analysis -- Data processing