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01207cam a2200289 a 4500 |
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971014s1998 maua b 001 0 eng |
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|a 97045518
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|a 0792380827 (hb : alk. paper)
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|a DLC
|c DLC
|d HR-ZaFER
|b hrv
|e ppiak
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|a QA76.9.S88
|b E44 1998
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082 |
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|a 621.39/2
|2 21
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|a System synthesis with VHDL /
|c edited by Petru Eles, Krzysztof Kuchcinski, and Zebo Peng.
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260 |
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|a Boston :
|b Kluwer Academic Publishers,
|c c1998.
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300 |
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|a xiii, 370 p. :
|b ill. ;
|c 25 cm.
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504 |
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|a Includes bibliographical references (p. [351]-363) and index.
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650 |
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|a System design.
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|a VHDL (Computer hardware description language)
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700 |
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|a Eles, Petru
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|a Kuchcinski, Krzysztof.
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|a Peng, Zebo.
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|3 Publisher description
|u http://www.loc.gov/catdir/enhancements/fy0820/97045518-d.html
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|3 Table of contents only
|u http://www.loc.gov/catdir/enhancements/fy0820/97045518-t.html
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|a 7
|b cbc
|c orignew
|d 1
|e ocip
|f 19
|g y-gencatlg
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|2 udc
|c K
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|a pc19 to ja00 10-14-97; jf06 to subj 10-14-97; jf11 to sl 10-16-97;jf12 10-16-97; CIP ver. jf06 03-06-98
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|c 34441
|d 34441
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