|
|
|
|
| LEADER |
00991cam a22002534a 4500 |
| 005 |
20130713153558.0 |
| 008 |
000427s2000 cau 001 0 eng |
| 010 |
|
|
|a 00103964
|
| 020 |
|
|
|a 0124406513
|
| 040 |
|
|
|a DLC
|c DLC
|d HR-ZaFER
|b hrv
|e ppiak
|
| 042 |
|
|
|a pcc
|
| 050 |
0 |
0 |
|a TK7885.7
|b .L444 2000
|
| 082 |
0 |
0 |
|a 621.39/2
|2 21
|
| 100 |
1 |
|
|a Lee, Weng Fook.
|
| 245 |
1 |
0 |
|a VHDL :
|b coding and logic synthesis with Synopsys /
|c Weng Fook Lee.
|
| 260 |
|
|
|a San Diego :
|b Academic Press,
|c c2000.
|
| 300 |
|
|
|a xxiv, 392 p. ;
|c 24 cm.
|
| 650 |
|
0 |
|a VHDL (Computer hardware description language)
|
| 856 |
4 |
2 |
|3 Publisher description
|u http://www.loc.gov/catdir/description/els031/00103964.html
|
| 856 |
4 |
1 |
|3 Table of contents
|u http://www.loc.gov/catdir/toc/els031/00103964.html
|
| 906 |
|
|
|a 7
|b cbc
|c orignew
|d 2
|e epcn
|f 20
|g y-gencatlg
|
| 942 |
|
|
|2 udc
|c K
|
| 955 |
|
|
|a pc21 04-27-00; to ASCD pb07 01-29-01; jg00 02-13-01; jg12 04-19-01; jg07 04-20-01; to Dewey 04-20-01; aa07 05-22-01
|
| 999 |
|
|
|c 37262
|d 37262
|
