|
|
|
|
LEADER |
01308nam a2200289 p 4500 |
003 |
HR-ZaFER |
005 |
20130713153751.0 |
008 |
780802s1977 ne a b 100 0 eng |
010 |
|
|
|a 78308633
|
015 |
|
|
|a Ne78-3
|
020 |
|
|
|a 902860667X :
|c fl 140.40
|
040 |
|
|
|a DLC
|c DLC
|d HR-ZaFER
|b hrv
|e ppiak
|
050 |
0 |
0 |
|a TK7874
|b .N34 1977
|
082 |
0 |
0 |
|a 621.381/73
|
111 |
2 |
|
|a Nato Advanced Study Institute on Process and Device Modeling for Integrated Circuit Design,
|c Louvain-la-Neuve, Belgium,
|d 1977.
|
245 |
1 |
0 |
|a Process and device modeling for integrated circuit design :
|b [proceedings of the NATO Advanced Study Institute on Process and device modeling for integrated circuit design, Louvain-la-Neuve, Belgium, July 19-29, 1977] /
|c edited by Fernand van de Wiele, Walter L. Engl. Paul G. Jespers.
|
260 |
|
|
|a Leyden :
|b Noordhoff,
|c 1977.
|
300 |
|
|
|a ix, 867 str. :
|b ilustr. ;
|c 25 cm.
|
440 |
|
0 |
|a NATO advanced study institutes series : Series E. Applied science ;
|v no. 21
|
504 |
|
|
|a Includes bibliographical references.
|
650 |
|
0 |
|a Integrated circuits
|x Design and construction
|x Simulation methods.
|
700 |
1 |
|
|a Wiele, Fernand van de.
|
700 |
1 |
|
|a Engl, Walter L.
|
700 |
1 |
|
|a Jespers, Paul G.
|
906 |
|
|
|a 7
|b cbc
|c orignew
|d 3
|e ncip
|f 19
|g y-gencatlg
|
942 |
|
|
|2 udc
|c K
|
999 |
|
|
|c 40280
|d 40280
|