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100423s2019 njua b 001 0 eng |
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|c 52418
|d 52418
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|a 9781119481515
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|a DLC
|c DLC
|d DLC
|d HR-ZaFER
|b hrv
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|a ukblcatcopy
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|a 621.39732
|2 22
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100 |
1 |
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|a Baker, R. Jacob,
|d 1964-
|9 42587
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245 |
1 |
0 |
|a CMOS :
|b circuit design, layout, and simulation /
|c R. Jacob Baker.
|
250 |
|
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|a 4. izd.
|
260 |
|
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|a Piscataway, N.J. :
|b IEEE Press ;
|a Hoboken, N.J. :
|b Wiley,
|c 2019.
|
300 |
|
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|a xxxv, 1235 str. :
|b ilustr. ;
|c 29 cm.
|
500 |
|
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|a Text on lining papers.
|
504 |
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|a Includes bibliographical references and index.
|
520 |
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|a "The third edition of CMOS: Circuit Design, Layout, and Simulation continues to cover the practical design of both analog and digital integrated circuits, offering a vital, contemporary view of a wide range of analog/digital circuit blocks, the BSIM model, data converter architectures, and much more"--
|
650 |
|
0 |
|a Metal oxide semiconductors, Complementary
|x Design and construction.
|9 42588
|
650 |
|
0 |
|a Integrated circuits
|x Design and construction.
|9 42589
|
650 |
|
0 |
|a Metal oxide semiconductor field-effect transistors.
|9 41760
|
942 |
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|2 udc
|c K
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