Design and optimization of the VLSI architecture for discrete Cosine transform used in image compression
| Permalink: | http://skupni.nsk.hr/Record/nsk.NSK01000197788/Similar |
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| Matična publikacija: |
CIT. Journal of computing and information technology 4 (1996), 3 ; str. 159-170 |
| Glavni autor: | Kovač, Mario, inženjer elektrotehnike (-) |
| Ostali autori: | Žagar, Mario (-), Ranganathan, N. |
| Vrsta građe: | Članak |
| Jezik: | eng |
| Predmet: |
APA stil citiranja
Kovač, M., Žagar, M., & Ranganathan, N. (1996). Design and optimization of the VLSI architecture for discrete Cosine transform used in image compression: Design and optimization of the VLSI architecture for discrete Cosine transform used in image compression. CIT. Journal of computing and information technology.
Chicago stil citiranjaKovač, Mario, Mario Žagar, and N. Ranganathan. "Design and optimization of the VLSI architecture for discrete Cosine transform used in image compression: Design and optimization of the VLSI architecture for discrete Cosine transform used in image compression." 1996.
MLA stil citiranjaKovač, Mario, Mario Žagar, and N. Ranganathan. "Design and optimization of the VLSI architecture for discrete Cosine transform used in image compression: Design and optimization of the VLSI architecture for discrete Cosine transform used in image compression." 1996.