A Design of Telemetry System for Small Animals
The external unit of small telemetry system for animals uses inductive link to transmit both data and power to a small implant. In this work, firstly, we have presented a wideband frequency shift keying (FSK) transmitter, which is a class E power amplifier (PA) switches between two load networks tha...
| Permalink: | http://skupni.nsk.hr/Record/nsk.NSK01001163154/Details |
|---|---|
| Matična publikacija: |
Journal of communications software and systems (Online) 17 (2021), 3 ; str. 244-253 |
| Glavni autori: | El Boutahiri, Abdelali (Author), El Khadiri, Karim, Tahiri, Ahmed, Qjidaa, Hassan |
| Vrsta građe: | e-članak |
| Jezik: | eng |
| Online pristup: |
https://doi.org/10.24138/jcomss-2021-0065 Elektronička verzija članka Elektronička verzija članka |
| LEADER | 02819naa a22003614i 4500 | ||
|---|---|---|---|
| 001 | NSK01001163154 | ||
| 003 | HR-ZaNSK | ||
| 005 | 20230213112657.0 | ||
| 006 | m d | ||
| 007 | cr|||||||||||| | ||
| 008 | 230213s2021 ci |o |0|| ||eng | ||
| 024 | 7 | |2 doi |a 10.24138/jcomss-2021-0065 | |
| 035 | |a (HR-ZaNSK)001163154 | ||
| 040 | |a HR-ZaNSK |b hrv |c HR-ZaNSK |e ppiak | ||
| 041 | 0 | |a eng | |
| 042 | |a croatica | ||
| 044 | |a ci |c hr | ||
| 080 | 1 | |2 2011 | |
| 100 | 1 | |a El Boutahiri, Abdelali |4 aut |9 HR-ZaNSK | |
| 245 | 1 | 0 | |a A Design of Telemetry System for Small Animals |h [Elektronička građa] |c Abdelali El Boutahiri, Karim El Khadiri, Ahmed Tahiri, Hassan Qjidaa. |
| 300 | |b Ilustr. | ||
| 504 | |a Bibliografija: | ||
| 504 | |a Summary. | ||
| 520 | |a The external unit of small telemetry system for animals uses inductive link to transmit both data and power to a small implant. In this work, firstly, we have presented a wideband frequency shift keying (FSK) transmitter, which is a class E power amplifier (PA) switches between two load networks that make the PA tuned correctly at tow input clock frequencies. Carrier frequencies used for data modulation are 5MHz/10MHz, the data rate of the proposed link is 2.5 Mbps. On the other hand, the analog circuits of the internal unit are designed in this paper. Internal unit has a demodulator circuit to derive directly a frequency clock from the FSK carrier and to sample the binary data stream. It also has a low power generator circuit to generate the supply voltage to the other blocks. The low power generator is composed of a high efficiency, low power rectifier, and a low power voltage regulator. To minimize the quiescent current of the regulator, we propose a control section which is a two-stage error amplifier to control the gate voltage of the PMOS transistors used in the differential pair of the voltage regulator and thus stabilize the direct current (DC) level at its output signal (Vreg). The output voltage of the proposed generator circuit is regulated at 1V, the quiescent current simulated is about 9.9μA and the line regulation performance is only 8mV/V. All circuits proposed in this paper were designed and simulated using Cadence in 180 nm CMOS technology. | ||
| 700 | 1 | |a El Khadiri, Karim |4 aut |9 HR-ZaNSK | |
| 700 | 1 | |a Tahiri, Ahmed |4 aut |9 HR-ZaNSK | |
| 700 | 1 | |a Qjidaa, Hassan |4 aut |9 HR-ZaNSK | |
| 773 | 0 | |t Journal of communications software and systems (Online) |x 1846-6079 |g 17 (2021), 3 ; str. 244-253 |w nsk.(HR-ZaNSK)000644741 | |
| 981 | |b Be2021 | ||
| 856 | 4 | 0 | |u https://doi.org/10.24138/jcomss-2021-0065 |
| 856 | 4 | 0 | |u https://jcoms.fesb.unist.hr/10.24138/jcomss-2021-0065/ |y Elektronička verzija članka |
| 856 | 4 | 0 | |u https://jcoms.fesb.unist.hr/pdfs/v17n3_2021-0065_boutahiri.pdf |y Elektronička verzija članka |
| 856 | 4 | 1 | |y Digitalna.nsk.hr |